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翻訳と辞書　辞書検索 [ 開発暫定版 ] スポンサード リンク Physical verification ： ウィキペディア英語版 Physical verification Physical verification is a process whereby an IC layout design is checked via EDA software tools to see if it meets certain criteria. Verification involves DRC (Design rule check), LVS (Layout versus schematic), ERC (Electrical Rule Check), XOR (Exclusive OR), and Antenna Checks. == XOR Check== This check is typically run after a metal spin, where the original and modified database are compared. This is done to confirm that the desired modifications have been made and no undesired modifications have been made by accident. This step involves comparing the two layout databases/GDS by XOR operation of the layout geometries. This check results a database which has all the mismatching geometries in both the layouts. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Physical verification」の詳細全文を読む スポンサード リンク 翻訳と辞書 : 翻訳のためのインターネットリソース Copyright(C) kotoba.ne.jp 1997-2016. All Rights Reserved.